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Verification/Writing Testbenches

Exhaustively Test a Full Adder

medium
writing-testbenchesself-checkingcombinationalexhaustive-testing

This time the roles are reversed: the design is already correct, and your job is to write the testbench that proves it.

The DUT (given, fixed)

module full_adder (
    input  a,
    input  b,
    input  cin,
    output sum,
    output cout
);

    assign {cout, sum} = a + b + cin;

endmodule

This is a standard 1-bit full adder: sum is the XOR of the three inputs, and cout is the carry out of adding a + b + cin. It has only 3 one-bit inputs, so there are exactly 8 possible input combinations — small enough to test exhaustively (every single case, not just a sample).

Your task

Complete the testbench so that it:

  1. Instantiates full_adder (already done for you).
  2. Drives every one of the 8 combinations of {a, b, cin}.
  3. For each combination, computes the expected sum and cout from a + b + cin and compares them against the DUT’s actual outputs.
  4. Uses an errors counter, printing $display("FAIL: ...") on any mismatch.
  5. Ends with SIMULATION PASSED or SIMULATION FAILED (%0d errors) as usual.

Interface (of the testbench under test)

Signal Direction Width Description
a input to DUT 1 First operand
b input to DUT 1 Second operand
cin input to DUT 1 Carry in
sum output of DUT 1 Expected: a ^ b ^ cin
cout output of DUT 1 Expected: majority(a, b, cin)

Notes

  • A for loop over i = 0 to 7, driving {a, b, cin} = i[2:0], is the cleanest way to hit all 8 combinations.
  • Because the circuit is combinational, remember to add a small delay (e.g. #1) after changing inputs before you check the outputs.
  • a + b + cin evaluated as a 2-bit expression directly gives you {expected_cout, expected_sum} — no need to hand-derive a truth table.