- 1medium
Exhaustively Test a Full Adder
Write a self-checking testbench that exhaustively verifies every input combination of a 1-bit full adder.
- 2medium
Verify a Counter's Sequence
Write a self-checking testbench that drives a 4-bit counter for many cycles and verifies it increments and wraps correctly.
- 3medium
Verify an FSM's Output Sequence
Write a self-checking testbench that streams a bit sequence into a '101' pattern-detector FSM and verifies its Moore output at every cycle.
- 4medium
Verify a Shift Register
Write a self-checking testbench that shifts a known bit pattern into a 4-bit shift register and verifies its contents after every shift.