Clock Domain Crossing

2-Flop Synchronizer

The fundamental single-bit CDC primitive: two cascaded flip-flops that let a metastable sample resolve before any downstream logic consumes it.

Pulse Synchronizer

Convert a single-cycle pulse in one clock domain into a single-cycle pulse in another, using toggle encoding plus a 2-flop sync plus edge detection.

Toggle Synchronizer

Cross a level signal that changes state by toggle-encoding it in the source domain and 2-flop synchronizing the toggle bit — the reusable core inside the Pulse Synchronizer.

Handshake Synchronizer (4-Phase Req/Ack)

A 4-phase req/ack handshake that safely moves a multi-bit data word across a clock domain boundary using only synchronized control signals.