Memories

Synchronous ROM

A synchronous, fixed-content lookup table addressed combinationally and read out one cycle later — the basic ROM pattern used for coefficient tables, opcode decode tables, and boot code.

Single-Port RAM

A single-address-port synchronous RAM with a write-enable and registered read, using the standard read-old-data behavior on same-address read/write collisions.

Dual-Port RAM

A true dual-port RAM with two independent read/write ports sharing one memory array, plus a look at the simpler one-read-port/one-write-port variant.

Register File (2 Read Ports, 1 Write Port)

A small CPU-style register file: N registers, 2 combinational read ports, 1 synchronous write port, single-cycle read latency.

External SRAM Controller

An FSM-based controller for an external asynchronous-SRAM-style bus: address/control sequencing, a muxed bidirectional data bus, and a couple of wait states before capture.