HDLbits
Start Practicing

Verilog Language/Basics

Half Adder

easy
basicsadderassigncombinational

A half adder adds two single bits together, producing a sum bit and a carry-out bit. It’s the simplest building block of binary addition circuits, but it cannot accept a carry-in — that requires a full adder.

Build a circuit with inputs a and b, and outputs sum and cout, implementing a half adder.

Interface

Signal Direction Width Description
a input 1 Operand
b input 1 Operand
sum output 1 Sum bit, a XOR b
cout output 1 Carry-out bit, a AND b

Truth Table

a b sum cout
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

Notes

  • sum is the XOR of the two inputs.
  • cout is the AND of the two inputs (a carry only occurs when both bits are 1).