Scaling up the pipeline
This is structurally the same idea as the 2-Stage Pipeline problem, generalized to an arbitrary number of stages via a generate-friendly loop over a STAGES parameter (default 4). The point of building it this way — rather than hand-writing four named registers — is to make the scaling relationship between stage count, latency, and throughput completely explicit and parametric, which is exactly how real pipelined datapaths (multipliers, floating-point units, deep arithmetic chains) are structured.
Interface
Identical to the 2-Stage Pipeline problem, plus the STAGES parameter:
| Signal | Direction | Description |
|---|---|---|
STAGES |
parameter | Number of pipeline register stages (this problem uses 4). |
clk/rst |
input | Clock and synchronous, active-high reset. |
in_valid/in_data |
input | New input, accepted every cycle. |
out_valid/out_data |
output | Output, valid exactly STAGES cycles after the corresponding input. |
Latency vs. throughput, concretely
| Design | Latency (cycles) | Throughput (results/cycle) |
|---|---|---|
| 2-Stage Pipeline | 2 | 1 |
| 4-Stage Pipeline | 4 | 1 |
Doubling the stage count doubles the latency but does not change the throughput at all — a new input is still accepted every single cycle, and a result is still produced every single cycle (just a longer-delayed one). This is precisely why real high-frequency designs add pipeline stages: each additional register boundary shortens the combinational logic between flops (helping timing closure / higher clock frequency), at the cost of more cycles of latency before any single result appears — a cost that’s invisible to sustained throughput as long as the pipeline keeps being fed every cycle.
Correctness constraints
out_valid/out_datamust reflect thein_valid/in_datafrom exactlySTAGEScycles earlier, for anySTAGES >= 1.- The pipeline must accept new input every cycle with no stalling.
- The design must work correctly for
STAGESvalues other than 4 (e.g. 1, 2, 8) without modification — this is what “generic” means for a parametric pipeline.